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CD4017

译码计数器

符合欧盟最新环保标准，已通过ROHS认证及REACH指令，绿色环保无铅产品。

CD40174000系列产品详情

TThe CD4017 isa5 -stage Johnson decade counter with ten spike-free decoded active HIGH outputs(Q0 toQ9),an active LOW carry output from the most significant flip-flop(Q5―-9),active HIGH and active LOWclock inputs(CP0,―CP¹)and an overriding asynchronous master reset input(MR).The counter is advanced by either a LOW-to-HIGH transition at CPO while Pl is LOW or aHIGH-to-LOW transition at CP1 while CPO is HIGH.When cascading counters,the Q5-9 output,which is LOW while the counter is in states 5,6,7,8,and 9,can beused to drive the CPO input of the next counter. A HIGH on MR resets the counter to zero(Q0=Q5-9=HIGH;Q1 to Q9=LOW)independent of the clock inputs(CP0,CP1).Automatic counter code correction is provided by an internal circuit: following any illegal code the counterreturns to a proper counting mode within 11 clock pulses.It operates over a recommended VDD power supply range of 3 V to 15 Vreferenced to VSS(usually ground).Unused inputs must be connected to VDD,VSS,or another input.

Features

Wide supply voltage range from 3V to 15V

Automatic counter correction

Tolerant of slow clock rise and fall times

5V,10V,and 15V parametric ratings

Standardized symmetrical output characteristics

Specified from -40℃ to +85℃

Packaging information:DIP16/SOP16/TSSOP16